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Books and Book Chapters Heading link

  1. I. P.-Vaisband and Eby G. Friedman, Secure Power Management and Delivery within Intelligent Power Networks On-Chip,  Green Photonics and Electronics, G. Eisenstein, D. Bimberg, (Eds.), Springer, 2017, ISBN # 978-3-319-67002-7.
  2. I. P.-Vaisband, R. Jakushokas, M. Popovich, A. V. Mezhiba, S. Köse, and E. G. Friedman, On-Chip Power Delivery and Management, 4th Edition, Springer, 2016, ISBN-13: 978-3319293936, ISBN-10: 3319293931.

Journal Papers Heading link

  1. D. Utyamishev and I. P.-Vaisband, “Netwise Detection of Hardware Trojans Using Scalable Convolution of Graph Embedding Clouds,” IEEE Transactions on Computer-Aided Design on Integrated Circuits and Systems, doi: 10.1109/TCAD.2024.3383348 (early access), 2024.
  2. D. Utyamishev and I. P.-Vaisband, “Multiterminal Pathfinding in Practical VLSI Systems with Deep Neural Networks,” ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 28, No. 4, pp. 1-19, 2022.
  3. A. Fouman Ajirlou, F. Kenarangi, E. Shapira, I. Partin-Vaisband I, “NoD: A Neural Network-Over-Decoder for Edge Intelligence,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 30, No. 10, pp. 1438-1447, 2022.
  4. F. Kenarangi and I. P.-Vaisband, “A Single-MOSFET Analog High Resolution-Targeted (SMART) Multiplier for Machine Learning Classification,” IEEE Journal on Emerging and Selected Topics in Circuits and Systems, Vol. 11, No. 4, pp. 816-828, 2021.
  5. A. Fouman and I. P.-Vaisband, “A Machine Learning Pipeline Stage for Adaptive Frequency Adjustment,” IEEE Transactions on Computers, Vol. 71, No. 3, pp. 587-598, 2021.
  6. F. Kenarangi, X. Hu, Y. Liu, J. A. Incorvia, J. S. Friedman, I. Partin-Vaisband, “Exploiting Dual-Gate Ambipolar CNFETs for Scalable Machine Learning Classification,” Scientific Reports, Vol. 10, No. 1,  2020.
  7. F. Kenarangi and I. P.-Vaisband, “Leveraging Independent Double-Gate FinFET Devices for Machine Learning Classification,” IEEE Transactions on Circuits and Systems I, Vol. 66, No. 11, pp. 4356–4367, 2019.
  8. D. Utyamishev and I. P.-Vaisband, “Real-Time Detection of Power Analysis Attacks by Machine Learning of Power Supply Variations On-Chip,” IEEE Transactions on Computer-Aided Design on Integrated Circuits and Systems, Vol. 39, No. 1, pp. 45–55, 2018.
  9. F. Kenarangi and I. P.-Vaisband, “Exploiting Machine Learning Against On-Chip Power Analysis Attacks: Tradeoffs and Design Considerations,” IEEE Transactions on Circuits and Systems I, Vol. 66, No. 2, pp. 769–781, 2018.
  10. I. Vaisband and E. G. Friedman, “Stability of Distributed Power Delivery Systems with Multiple Parallel On-Chip LDO Regulators,” IEEE Transactions on Power Electronics, Vol. 31, No. 8, pp. 5625–5634, October 2015.
  11. I. Vaisband, B. Price, S. Köse, Y. Kolla, E. Friedman, and J. Fischer, “Distributed LDO Regulators in a 28 nm Power Delivery System,” Analog Integrated Circuits and Signal Processing, Vol. 83, No.3, pp. 295–309, March 2015.
  12. I. Vaisband, M. Saadat, and B. Murmann, “A Closed-Loop Reconfigurable Switched-Capacitor DC-DC Converter for Sub-mW Energy Harvesting Applications,” IEEE Transactions on Circuits and Systems I, Vol. 62, No. 2, pp. 385–394, November 2015.
  13. I. Vaisband and E. Friedman, “Energy Efficient Adaptive Clustering of On-Chip Power Delivery Systems,” Integration, the VLSI Journal, Vol. 48, pp. 1–9, January 2015.
  14. I. Vaisband, M. Azhar, E. Friedman, and S. Köse, “Digitally Controlled Pulse Width Modulator for On-Chip Power Management,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 22, No. 12, pp. 2527–2534, January 2014.
  15. I. Vaisband and E. Friedman, “Heterogeneous Methodology for Energy Efficient Distribution of On-Chip Power Supplies,” IEEE Transactions on Power Electronics, Vol. 28, No. 9, pp. 4267–4280, September 2013.
  16. I. Vaisband, E. G. Friedman, R. Ginosar, and A. Kolodny “Low Power Clock Network Design,” Journal of Low Power Electronics and Applications, No. 1, Vol. 1, pp. 219–246, May 2011 (invited paper).​

Conference Papers Heading link

  1. Rami Rasheedi and Inna Partin-Vaisband, “An Embedded Multi-Layer Spiral Square Inductor for Integrated Power Delivery – Physical Design and Analytical Models,” Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI), June 2024.
  2. Mohamed Adel Gharib, Salma Abdelzaher, and Inna Partin-Vaisband, “An Analytical Model for High-Frequency Through Silicon Vias,” Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI), June 2024.
  3. Sriharini Krishnakumar, Yaroslav Popryho, and Inna Partin-Vaisband, “System Architecture Optimization for Vertical Power Delivery,” Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI), June 2024.
  4. Sriharini Krishnakumar, Mingeun Choi, Ramin Rahimzadeh Khorasani, Rohit Sharma, Madhavan Swaminathan, Satish Kumar, and Inna Partin-Vaisband, “Vertical Power Delivery for High Performance Computing Systems with Buck-Derived Regulators,” Proceedings of the IEEE Electronic Components and Technology Conference (ECTC), May 2024.
  5. M. Choi, S. Krishnakumar, R. Khorasani, I. Partin-Vaisband, R. Sharma, M. Swaminathan, and S. Kumar,  “Thermal Analysis of High Current Vertical Power Delivery Network with Embedded Microchannel Cooling,” Proceedings of the IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm), May 2024.
  6. S. Krishnakumar and I. Partin-Vaisband, “Design Considerations for DC-DC Voltage Regulators in Distributed Vertical Power Delivery Systems,” Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), June 2024.
  7. S. Krishnakumar and I. Partin-Vaisband, “Vertical Power Delivery for Emerging Packaging and Integration Platforms – Power Conversion and Distribution,” IEEE International System-on-Chip Conference (SOCC), pp. 1-6, September 2023.
  8. S. Krishnakumar and I. Partin-Vaisband, “Vertical Power Delivery for Emerging Packaging and Integration Platforms – Models and Architectures,” SRC TECHCON, pp. 1-4, September 2023.
  9. V. Petrolo and I. Partin-Vaisband, “ML-Assisted Framework for Simulation and Optimization of Large Scale Analog and Mixed-Signal Integrated Sensors,” SRC TECHCON, pp. 1-4, September 2023.
  10. D. Utyamishev and I. P.-Vaisband, “Knowledge Graph Embedding and Visualization for Pre-Silicon Detection of Hardware Trojans,” Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), pp. 180-184, June 2022.
  11. D. Utyamishev and I. P.-Vaisband, “Late Breaking Results: Parallelizing Net Routing with cGANs,” ACM/IEEE Design Automation Conference (DAC), pp. 1-2, December 2021.
  12. F. Kenarangi and I. P.-Vaisband, “PySyn: A Rapid Synthesis for Mixed-Signal Machine Learning Classification,” IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), pp. 712-717, August 2021.
  13. D. Utyamishev and I. P.-Vaisband, “Late Breaking Results: A Neural Network that Routes ICs,” ACM/IEEE Design Automation Conference (DAC), pp. 1-2, July 2020.
  14. F. Kenarangi and I. P.-Vaisband, “Security Network On-Chip for Mitigating Side-Channel Attacks,” Proceedings of the ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP), June 2019.
  15. I. P.-Vaisband, “Efficient Wireless Power Transfer for Heterogeneous Adaptive IoT Systems,” Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI), May 2018.
  16. I. P.-Vaisband, “Automated Design of Stable Power Delivery Systems for Heterogeneous IoT Systems,” Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI), May 2017.
  17. I. P.-Vaisband and E. G. Friedman, “Passivity-Based Automated Design of Stable Multi-Feedback Distributed Power Delivery Systems,” Proceedings of the Government Microcircuit Applications & Critical Technology Conference (GOMACTech), March 2017.
  18. I. Vaisband and E. G. Friedman, “Dynamic Power Management with Power Network-on-Chip,” Proceedings of the IEEE International NEWCAS Conference, June 2014.
  19. I. Vaisband and E. G. Friedman, “Power Network On-Chip for Scalable Power Delivery,” Proceedings of the ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP), June 2014.
  20. I. Vaisband, and E. Friedman, “Computationally Efficient Clustering of Power Supplies in Heterogeneous Real Time Systems,” Proceedings of the IEEE Symposium on Circuits and Systems (ISCAS), pp. 1628–1631, May 2014.
  21. S. Köse, I. Vaisband, and E. Friedman, “Digitally Controlled Wide Range Pulse Width Modulator for On-Chip Power Supplies,” Proceedings of the IEEE Symposium on Circuits and Systems (ISCAS), pp. 2251–2254, May 2013.
  22. I. Vaisband, R. Ginosar, A. Kolodny, E. G. Friedman, “Energy Metrics for Power Efficient Crosslink and Mesh Topologies,” Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1656–1659, May 2012.
  23. I. Vaisband, R. Ginosar, A. Kolodny, E. G. Friedman, “Power Efficient Tree-Based Crosslinks for Skew Reduction,” Proceedings of the ACM Great Lakes Symposium on VLSI (GLSVLSI), pp. 285–290, May 2009.
  24. I. Vaisband, B. Yeger, I. Granovsky, D. Federovsky, “Reducing Turn Around Time of complicated ECOs – ASIC Design Reutilization,” Proceedings of the Grace Hopper Celebration (GHC), October 2007.

Patents Heading link

  1. I. Vaisband and E. G. Friedman, “Heterogeneous Method for Energy Efficient Distribution of On-Chip Power Supplies and Power Network On-Chip System for Scalable Power Delivery,” United States Patent, No. 9,785,161, October 10, 2017.
  2. D. Federovsky, D. Kamshitsky, I. Vaisband, and B. Yeger, “Method and System for Reducing Turn Around Time of Complicated Engineering Change Orders and ASIC Design Reutilization,” United State Patent No. 20090178015, July 2009.