Introduction
WELCOME TO THE HiPerCAS TEAM!
Our research is focused on innovation in the area of design of energy efficient, high performance, secure VLSI systems. Special emphasis is placed on co-design across levels of VLSI design abstraction, including design methodologies, system architectures, algorithms, circuits, and emerging devices. On-going work spans design of vertical power delivery, artificially intelligent hardware, hardware security, and shifting electronic design automation paradigms through learning.
Our work is supported by the following recent grants:
- Argonne National Laboratory: Novel Design Solution for Vertical Power Delivery for Adaptive Intelligent Sensing, 08/2025-05/2026
- NRC Scholarship and Fellowship Program: Radiation-hardened Digital Boron-coated Straw Neutron Detectors, 11/2024-11/2027
- NSF CISE, CAREER: Unified Reference-Free Early Detection of Hardware Trojans via Knowledge Graph Embeddings, 08/2023-07/2028
- DARPA/SRC JUMP 2.0 Center, CHIMES: Center for Heterogeneous Integration of Micro Electronic Systems, 01/2023-12/2027
- DARPA/SRC JUMP 2.0 Center, CogniSense: Center on Cognitive Multispectral Sensors, 01/2023-12/2027
- NSF ECCS, Collaborative Research: 2D Ambipolar Machine Learning & Logical Computing Systems, 07/2022-06/2025
- Google Research Scholar Award, Knowledge Graph Embedding for Early Detection of Hardware Trojans, 2022
- NSF CISE, SHF: SMALL: End-to-End Global Routing with Reinforcement Learning in VLSI Systems, 02/2022-01/2026
Latest News
11/2025: Congratulations to Sriharini, Ayoub & Leonid, and Salma for their abstracts being accepted for presentations at ECTC 2026!
11/2025: Great news — Yaroslav and Hadi’s papers have been accepted for regular presentations at IEEE DATE! Special thanks to Prof. Debjit Pal for his valuable contribution to Yaroslav’s paper.
11/2025: Prof. Partin-Vaisband has been invited to join the IEEE EPEPS TPC.