WELCOME TO THE HiPerCAS TEAM!
Our research is focused on innovation in the area of design of energy efficient, high performance, secure VLSI systems. Special emphasis is placed on co-design across levels of VLSI design abstraction, including design methodologies, system architectures, algorithms, circuits, and emerging devices. On-going work spans design of vertical power delivery, artificially intelligent hardware, hardware security, and shifting electronic design automation paradigms through learning.
Our work is supported by the following recent grants:
- NSF CISE, CAREER: Unified Reference-Free Early Detection of Hardware Trojans via Knowledge Graph Embeddings, 08/2023-07/2028
- DARPA/SRC JUMP 2.0 Center, CHIMES: Center for Heterogeneous Integration of Micro Electronic Systems, 01/2023-12/2027
- DARPA/SRC JUMP 2.0 Center, COGNISENSE: Center on Cognitive Multispectral Sensors, 01/2023-12/2027
- NSF ECCS, Collaborative Research: 2D Ambipolar Machine Learning & Logical Computing Systems, 07/2022-06/2025
- Google Research Scholar Award, Knowledge Graph Embedding for Early Detection of Hardware Trojans, 2022
- NSF CISE, SHF: SMALL: End-to-End Global Routing with Reinforcement Learning in VLSI Systems, 02/2022-01/2025
Latest News Heading link
04/2024: Congratulations for their accepted GLSVLSI papers!
* Rami, “An Embedded Multi-Layer Spiral Square Inductor for Integrated Power Delivery – Physical Design and Analytical Models” (oral presentation),
* Mohamed and Salma, “An Analytical Model for High-Frequency Through Silicon Vias” (poster presentation),
* Sriharini and Yaroslav, “System Architecture Optimization for Vertical Power Delivery” (LBR poster presentation)
03/2024: Congratulations to Dmitry on his accepted TCAD paper titled “Netwise Detection of Hardware Trojans Using Scalable Convolution of Graph Embedding Clouds”!